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low power, pseudo differential, 100 ksps 12-bit adc in an 8-lead sot-23 ad7457 rev. a in fo rmation furn ished by an alog d e v i c e s is believed to be accurate and reliable. how e ver, n o resp on sibili ty is assume d b y a n alog de vices fo r its use, nor for an y i n fri n geme nt s of p a t e nt s or ot h e r ri ght s o f th ird parties th at may result fro m its use . s p ecificatio n s subj ec t to ch an g e witho u t n o tice. no licen s e is g r an te d by implicati o n or ot herwi s e u n der a n y p a t e nt or p a t e nt ri ghts of analog de v i ces. trademarks an d registered tra d ema r ks are the prop erty o f their respective ow ners. one technolog y way, p.o . box 9106, norwood, ma 02062-9106, u.s.a. t e l: 781. 329. 4 700 www.analog.com fax: 781. 326. 87 03 ? 2005 analog de vices, i n c. al l r i ght s r e ser v ed . features specified for v dd of 2.7 v to 5. 25 v low power: 0.9 mw max at 100 ksps with v dd = 3 v 3 mw max at 1 00 ksps with v dd = 5 v pseudo differe ntial analog in put wide input bandwidth: 70 db sinad at 30 k hz inpu t fr equency flexible power/serial clock speed managem e nt n o pipeline delays high speed s e r i al interfaces p i?-/qspi?-/ microwire?-/dsp-compatible automatic power-down mode 8-lea d sot-23 package applic ati o ns transducer int e rface battery-powered systems data acq u isitio n systems portable instrumentation func tio n a l block di agram v ref t/h contr ol logic 12-bit successive appr o xima tion adc gnd sclk sd a t a cs v dd ad7457 v in+ v in ? 03157-0-013 fi g u r e 1 . general description the ad7457 is a 12-b i t, lo w p o w e r , s u cces si v e a p p r o x ima t ion (sar) a n alog-to-dig i t a l con v er t e r t h a t fe a t ur es a ps eudo dif f er en t i al a n al og in p u t. this p a r t o p era t es f r o m a sin g l e 2.7 v to 5 . 2 5 v p o we r supply and fe a t u r e s t h rou g h p ut r a te s of up to 100 ks ps. t h e p a r t c o n t a i ns a l o w noi s e, w i d e b a nd w i d t h , d i f f e r e n t i a l t r ack-and- h o ld (t/h) am plif ier t h a t c a n hand le in p u t f r e q ue n - cies in exces s o f 1 mh z. the r e f e r e n c e v o l t a g e fo r th e ad7457 is a p pl i e d e x te r n a l ly to t h e v ref p i n an d can ra n g e f r o m 100 mv to v dd , d e p e n d i n g o n w h at s u i t s t h e ap p l i c at i o n . the con v ersio n p r o c es s an d da t a acq u isi t ion a r e co n t r o l l e d usin g cs a n d t h e s e ri al c l oc k , allo w i n g th e devi ce t o i n t e rfa c e w i t h m i c r opro c e ss or s or d s p s . t h e s a r arch it e c tu re of t h i s p a r t en s u r e s t h a t t h er e a r e n o pi p e li n e de l a ys. the ad7457 us es ad van c e d des i g n t e chniq u es to ac hiev e v e r y lo w p o w e r dissi p a t io n. product highlights 1. o p era t ion wi th 2.7 v t o 5.25 v p o w e r s u p p lies. 2. l o w p o w e r co ns um p t ion. w i th a 3 v s u p p l y , t h e ad7457 o f fers 0.9 mw max i m u m p o w e r co n s um p t io n fo r a 100 ks ps thr o u g h p u t r a t e . 3. p s eudo dif f er en t i al a n alog i n p u t. 4. flexi b le po w e r/ser i al c l o c k spee d m a na g e m e n t . t h e c o n v e r s i on r a te i s de te r m i n e d by t h e s e r i a l cl o c k , a l l o w i ng t h e p o w e r t o b e r e d u ce d as t h e c o n v ersio n t i m e is r e d u ce d th r o ugh th e se rial c l oc k s p e e d in cr ea s e . a u t o ma ti c po w e r - do wn a f t e r con v ersio n al lo ws t h e a v era g e p o w e r co n s um p - ti o n t o be r e d u ced . 5. v a r i abl e volt age re fe re nc e i n put . 6. no p i p e l i n e d e l a y s . 7. a c c u ra t e con t r o l o f th e s a m p ling in s t an t v i a t h e cs in p u t a nd on ce-o f f con v ersio n con t r o l . 8. en o b > 10 b i ts typ i cal l y wi t h 5 00 mv r e f e r e n c e .
ad7457 rev. a | page 2 of 20 table of contents specifications ..................................................................................... 3 timing specifications ....................................................................... 5 absolute maximum ratings ............................................................ 6 esd caution .................................................................................. 6 pin configuration and function descriptions ............................. 7 typical performance characteristics ............................................. 8 te r m i no l o g y .................................................................................... 10 theory of operation ...................................................................... 11 circuit information .................................................................... 11 converter operation .................................................................. 11 adc transfer function ............................................................. 11 typical connection diagram ................................................... 11 analog input ............................................................................... 12 analog input structure .............................................................. 12 digital inputs .............................................................................. 13 reference section ....................................................................... 13 serial interface ............................................................................ 13 power consumption .................................................................. 14 microprocessor interfacing ....................................................... 14 application hints ........................................................................... 16 grounding and layout .............................................................. 16 outline dimensions ....................................................................... 17 ordering guide .......................................................................... 17 revision history 2/05rev. 0 to rev. a changes to table 3............................................................................ 6 changes to ordering guide .......................................................... 17 10/03rev. 0: initial version
ad7457 rev. a | page 3 of 20 specifications v dd = 2.7 v to 5.25 v, f sclk = 10 mhz, f s = 100 ksps, v ref = 2.5 v, t a = t min to t max , unless otherwise noted. table 1. parameter test conditions/comments b version 1 unit dynamic performance f in = 30 khz signal to noise ratio (snr) 2 71 db min signal to (noise + distortion) (sinad) 2 70 db min total harmonic distortion (thd) 2 ?84 db typ ?75 db max peak harmonic or spurious noise 2 ?86 db typ ?75 db max intermodulation distortion (imd) 2 fa = 25 khz; fb = 35 khz second-order terms ?80 db typ third-order terms ?80 db typ aperture delay 2 5 ns typ aperture jitter 2 50 ps typ full-power bandwidth 2 , 3 @ ?3 db 20 mhz typ @ ?0.1 db 2.5 mhz typ dc accuracy resolution 12 bits integral nonlinearity (inl) 2 1 lsb max differential nonlinearity (dnl) 2 guaranteed no missed codes to 12 bits 0.95 lsb max offset error 2 4.5 lsb max gain error 2 2 lsb max analog input full-scale input span v in+ ? v in ? v ref v absolute input voltage v in+ v ref v v in ? 4 v dd = 2.7 v to 3.6 v ?0.1 to +0.4 v v dd = 4.75 v to 5.25 v ?0.1 to +1.5 v dc leakage current 1 a max input capacitance when in track/hold 30/10 pf typ reference input v ref input voltage 5 1% tolerance for specified performance 2.5 v dc leakage current 1 a max v ref input capacitance when in track/hold 10/30 pf typ logic inputs input high voltage, v inh 2.4 v min input low voltage, v inl 0.8 v max input current, i in typically 10 na, v in = 0 v or v dd 1 a max input capacitance, c in 6 10 pf max logic outputs output high voltage, v oh v dd = 4.75 v to 5.25 v, i source = 200 a 2.8 v min v dd = 2.7 v to 3.6 v, i source = 200 a 2.4 v min output low voltage, v ol i sink = 200 a 0.4 v max floating-state leakage current 1 a max floating-state output capacitance 6 10 pf max output coding straight natural binary conversion rate conversion time 1.6 s with a 10 mhz sclk 16 sclk cycles track-and-hold acquisition time 2 1 s max throughput rate see the serial interface section 100 ksps max
ad7457 rev. a | page 4 of 20 parameter test conditions/comments b version 1 unit power requirements v dd 2.7/5.25 v min/max i dd 7 , 8 during conversion 6 v dd = 4.75 v to 5.25 v 1.5 ma max v dd = 2.7 v to 3.6 v 1.2 ma max normal mode (static) sclk on or off 0.5 ma typ normal mode (operational) v dd = 4.75 v to 5.25 v 0.7 ma max v dd = 2.7 v to 3.6 v 0.33 ma max power-down sclk on or off 1 a max power dissipation normal mode (operational) v dd = 5 v 3 mw max v dd = 3 v 0.9 mw max power-down v dd = 5 v; sclk on or off 5 w max v dd = 3 v; sclk on or off 3 w max 1 temperature range for b version: ? 40c to +85c. 2 see the section. terminology 3 analog inputs with slew rates exceeding 27 v/s (full-scale input sine wave > 3.5 mhz) within the acquisition time may cause a n incorrect result to be returned by the converter. 4 a dc input is applied to v inC to provide a pseudo ground for v in+ . 5 the ad7457 is functional with a refe rence input range of 100 mv to v dd . 6 guaranteed by characterization. 7 see the section. power consumption 8 measured with a full-scale dc input.
ad7457 r e v. a | pa ge 5 o f 2 0 timing specifica t ions 1 v dd = 2.7 v t o 5.25 v , f sc l k = 10 mh z, f s = 100 ks ps, v ref = 2.5 v , t a = t min to t max , u n l e ss ot he r w i s e note d. t a bl e 2. parameter limit at t min , t ma x unit description f sclk 2 1 0 k h z m i n 10 m h z m a x t con v ert 16 t sclk t sclk = 1/f sclk 1.6 s m a x t 2 10 ns min cs rising edge to sclk falling edge setup time t 3 3 20 ns max delay from cs risin g edge until sdata three-state disabled t 4 3 40 ns max data access time after sclk falling edge t 5 0.4 t sclk ns min sclk high pulse width t 6 0.4 t sclk ns min sclk low pulse width t 7 10 ns min sclk edge to da ta valid hold time t 8 4 10 ns min sclk falling edge to sdata three-state enabled 35 ns max sclk falling edge to sdata three-state enabled t power - up 5 1 s max power-up time from full power-down t po wer - do wn 7.4 s min minimum time spent in power-down 1 the timing s p ecif ic ations are guaranteed by characteriz a tion. al l input s i gnal s are s p ecif ied with t r = tf = 5 ns ( 10% to 90% of v dd ) a n d t i m e d from a volt a g e lev e l o f 1.6 v. see an d t h e serial s e ct ion . figur e 2 in t e rf a c e 2 mark/ s pace ratio for the sc lk input is 40/60 to 60/40. 3 mea s ure d with the loa d circuit o f a n d d e f i ne d as the time re quire d fo r the o u tput to cro s s 0.8 v or 2.4 v wi th v figu re 3 f i g ure 3. dd = 5 v, and th e time re quired f o r the o u tput to cross 0.4 v or 2.0 v for v dd = 3 v . 4 t 8 i s d e ri ved f r om t h e m e a s ur ed t i m e t a ken by t h e da t a o u t p ut s t o ch a n ge 0. 5 v wh en loa d ed wi t h t h e ci rcui t o f th e m e a s ured numbe r i s the n extrapo l ate d back to re mo ve the e f f e cts of charging o r d i s c harging the 25 pf capacito r. this me ans that the ti me , t 8 , quoted in the timing characteri s t ics is the true bus rel i nquis h time of the part and is in d e pe nde nt o f the bus lo ad ing. 5 se e t h e sect i o n . pow e r con s um pt i o n 0 0 0 db11 db10 db2 db1 db0 0 t 4 t 6 t 7 t 8 t 3 t powerdown three-state automatic power down t powerup t acquisition power up convert start track track t acquistion t powerup 4 leading zeros sdat a sclk cs three-state t 2 t 5 03157-0-001 hold f i g u re 2. a d 74 57 s e ri al int e r f ace ti mi ng d i ag r a m
ad7457 r e v. a | pa ge 6 o f 2 0 absolute maximum ra tings t a = 2 5 c , u n l e ss ot he r w i s e not e d. t a bl e 3. p a r a m e t e r r a t i n g v dd to gnd ?0.3 v to +7 v v in+ to gnd ?0.3 v to v dd + 0.3 v v inC to gnd ?0.3 v to v dd + 0.3 v digital input voltage to gnd ?0.3 v to +7 v digital output v o ltage to gnd ?0.3 v to v dd + 0.3 v v ref to gnd ?0.3 v to v dd + 0.3 v input current t o a n y pi n exce pt supplies 1 10 ma operating tem p erature range commercia l (b version) ?40c to +85c storage temperature range ?65c to +150c junction tempe r ature 150c ja thermal impedance 211.5c/w (sot-23) jc thermal impedance 91.99c/w (sot-23) lead temperature, soldering vapor phase (60 sec) 215c infrared (15 sec) 220c pb-free temper ature, soldering r e f l o w 2 6 0 ( + 0 ) c 1 transient currents of up to 100 ma do not cause s c r latch-up. s t r e s s es a b o v e t h os e lis t e d u n de r a b s o l u t e m a xi m u m r a t i n g s ma y c a us e p e r m a n en t dama ge t o t h e de vice . this is a s t r e s s ra t i n g onl y ; f u n c t i o n al o p era t ion o f t h e de vice a t t h es e o r an y o t h e r con d i t io ns a b o v e t h os e list e d i n t h e o p era t io nal s e c t io n s o f t h is sp e c if ic a t io n is n o t i m pli e d . e x p o sur e t o a b s o l u t e max i m u m ra t i ng co ndi t i on s fo r ex ten d e d p e r i o d s ma y a f fe c t de vice r e l i ab i l i t y . to output pin c l 25pf i oh 200 a i ol 1.6ma 1.6v 03157-0-012 f i gure 3 . l o a d cir c ui t fo r di g i ta l o u tput t i m i ng sp eci f ic ati o ns esd c a ution esd (electrostatic discharge) sensitive device. electrosta tic char ges as high as 4000 v readily ac cumulate on the human body and test eq uipment and c a n d i scharge wit h out d e tection. although th is product features proprietary esd protection circ uitry, permanent dama ge may occur on devices subjected to high energy electrostatic di scharge s . ther efore, pro p er esd precautions are rec o m m ended to avoid performan c e degradation or l o ss of functiona l ity.
ad7457 r e v. a | pa ge 7 o f 2 0 pin conf igura t ion and fu nction descriptions ad7457 top view (not to scale) v dd 1 sclk 2 sdata 3 cs 4 v ref v in+ v in ? gnd 8 7 6 5 03157-0-002 f i g u re 4. 8-l e ad s o t - 23 pin conf ig u r at ion t a bl e 4. p i n f u nc ti on des c ripti o ns pin no. nemonic description 1 v dd power supply input. v dd is 2.7 v to 5.25 v. this s u pply should be de coupled to gnd with a 0.1 f capacitor and a 10 f tantalum capacitor. 2 s c l k serial clo c k. log i c input. sclk provides the seria l clock for a cces s i ng data from the part. t h is cloc k input is als o used as the cloc k source for the conver sion pr oc ess. 3 s d a t a serial data. logi c output. the co nversi on result from the ad7457 is provided on this output as a serial data stream. the bits are clocked out on the falling ed ge of th e sclk i n put. the data s t re am of the ad 7457 consists of four leading zeros followed by the 12 bits of conversion data that are provided msb first. the output coding is straight (natural) binary. 4 cs chip select. t h is input provides the dual function of pow eri n g up the device an d initiating a conversio n on the ad7457. 5 g n d analog ground. ground reference point for all circuitry on the a d 7457. all analog inp ut signals and any external reference sign al should be re fer r ed to this gnd voltage. 6 v inC inverting input. this pin sets th e ground reference point for the v in+ input. connect to ground or to a dc offset to provide a pseud o ground. 7 v in+ noninverting analog input. 8 v ref reference input for the ad7457. an extern al refe rence in the range 100 mv to v dd must be applie d to this input. the specified re ference input is 2.5 v. this pin should be decoupled to gnd wit h a capacitor of at least 0.33 f.
ad7457 r e v. a | pa ge 8 o f 2 0 typical perf orm ance cha r acte ristics t a = 25c, f s = 100 ks ps, f sc l k = 10 mh z, v dd = 2.7 v t o 5.25 v , v ref = 2.5 v , unles s o t h e r w is e n o t e d. freq uency (khz) 65 10 s i nad (db) 20 50 70 75 v dd = 3v 30 40 v dd = 5v 03157-0-014 f i g u re 5. sina d v s . a n al og input f r equ e nc y f o r v dd = 3 v a n d 5 v 0 ?2 0 ?4 0 ?8 0 ?6 0 ?120 ?100 ?140 03157-0-015 suppl y ripple freq uency (khz) 0 100 200 300 400 500 p s rr (db) 900 1000 v dd = 5v v dd = 3v 100mv p-p sine wave on v dd no d e coupling on v dd 600 700 800 f i g u r e 6 . p s r r v s . s u pp l y ripp le f r e q ue n c y w i t h o u t su ppl y d e c o u p li n g frequency (khz) s nr (db) 0 ?20 ?40 ?80 ?60 ?120 ?100 ?140 0 100 8192 point fft f sample = 100ksps f in = 30khz sinad = 71db thd = ? 82db sfdr = ? 83db 03157-0-016 30 50 f i gure 7. d y na mi c p e r f o r m a nce fo r v dd = 5 v code dnl e rror (ls b ) 1.0 0.8 0.6 0.2 0.4 ?0.2 ?0.4 ?0.6 ?0.8 0 ?1.0 0 1024 3072 2048 4096 03157-0-017 f i g u re 8. t y pic a l d n l f o r t h e a d 74 57 f o r v dd = 5 v code inl e rror (ls b ) 1.0 0.8 0.6 0.2 0.4 ? 0.2 ? 0.4 ? 0.6 ? 0.8 0 ? 1.0 0 1024 3072 2048 4096 03157-0-018 f i gure 9. t y pic a l in l for the a d 7 4 57 f o r v dd = 5 v codes 0 2046 2047 2 048 2049 2050 2051 27 codes 24 codes 9949 codes 1,000 2,000 3,000 4,000 5,000 6,000 7,000 8,000 9,000 10,000 03157-0-019 counts f i g u re 10. h i s t og r a m of 1 0 ,0 0 0 conver s i ons of a dc input
ad7457 r e v. a | pa ge 9 o f 2 0 v ref (v) chang e i n dnl (l sb) 4.0 3.5 2.5 3.0 1.5 1.0 2.0 0.5 0 ? 0.5 ? 1.0 01 . 0 0.5 1.5 3.0 2.5 2.0 3.5 positive dnl negative dnl 03157-0-020 f i gure 1 1 . changes i n dnl vs . v ref for v dd = 5 v v ref (v) chang e i n i n l (l sb) 5 4 3 1 2 0 ? 1 ? 2 01 . 0 0.5 1.5 3.0 2.5 2.0 3.5 positive inl negative inl 03157-0-021 f i gure 1 2 . change in inl vs . v ref for v dd = 5 v v ref (v) ef f e ct i ve number o f bi t s (l sb) 12 11 10 8 9 7 6 01 . 0 0.5 1 . 5 3.0 2.5 2.0 3.5 v dd = 3v v dd = 5v 03157-0-022 f i g u re 13. e n ob v s . v ref for v dd = 3 v a n d 5 v
ad7457 rev. a | page 10 of 20 terminology s i g n a l t o (n o i s e + dis t o r t i o n ) r a t i o (s in ad) the m e as ur e d r a t i o o f s i n a d a t t h e o u t p u t o f t h e ad c. th e sig n al is t h e r m s a m pli t ude o f t h e f u ndam e n t al . n o is e is t h e s u m o f all n o n f un d a m e n t al si g n als u p t o h a lf th e sa m p lin g fr e q u e n c y ( f s /2), excl udin g dc. the ra t i o is de p e n d e n t on t h e n u m b e r o f q u a n ti za ti o n lev e l s in th e d i g i tiz a t i o n p r oce s s; t h e m o r e lev e ls, th e sm alle r th e q u a n tiz a ti o n n o i s e . t h e t h eo r e ti cal s i n a d ra tio f o r a n id eal n-b i t co n v er t e r wi t h a sin e wa ve in p u t is g i v e n b y ( ) ( ) db 76 . 1 02 . 6 + = + n distortion noise to signal ther efo r e , fo r a 12-b i t con v er t e r , t h e s i n a d is 74 db . t o t a l ha r m on i c d i s t or t i on ( t h d ) t h e r a t i o of t h e r m s su m of h a r m on i c s to t h e f u n d a me n t a l . f o r th e ad7457, i t is def i ned as () 1 2 6 2 5 2 4 2 3 2 2 20 db v v v v v v log thd + + + + = w h er e: v 1 is t h e r m s am pli t ude o f t h e f u ndam e n t al. v 2 , v 3 , v 4 , v 5 , a nd v 6 a r e t h e r m s a m pli t udes o f t h e s e con d t o t h e six t h ha r m o n i c s . p e a k h a rmo n i c o r s p uri o us n o is e the ra t i o o f t h e r m s val u e o f t h e n e xt la rg es t com p on e n t i n t h e a d c o u t p u t s p ectr um (u p t o f s /2 an d excl uding dc) to t h e r m s val u e o f t h e f u ndam e n t al. n o r m al ly , t h e val u e o f t h is s p e c if ic a - t i o n is deter mi ne d b y t h e la rg es t ha r m o n ic i n t h e s p e c t r um, b u t, fo r ad cs w h ere t h e ha r m o n i c s a r e b u r i e d i n t h e n o is e f l o o r , i t is a n o i s e p e a k . inte r m o d u l at i o n d i s t or t i on w i t h in p u ts co nsis tin g o f sine wa v e s a t tw o f r eq uen c ies, fa and fb , a n y a c t i v e de v i ce wi th n o nlin ea ri ti e s cr e a t e s d i s t o r ti o n p r o d - uc ts a t s u m and dif f er en ce f r e q uen c ies o f mfa nfb , w h er e m, n = 0, 1, 2, 3 , a n d s o o n . i n t e r m o d u l a t ion dist o r tio n t e r m s a r e th ose f o r wh ich n e i t h e r m n o r n a r e eq ual t o zer o . f o r exa m p l e , th e s e co n d o r d e r t e r m s in c l ude (fa + fb) a n d (fa ? fb), while the thir d o r d er t e r m s in c l ud e (2fa + fb), (2fa ? fb), (fa + 2fb) a n d (fa ? 2fb). the ad7457 is t e s t e d usin g t h e ccif s t anda rd , wher e tw o in p u t f r e q uen c ies n e ar t h e t o p e nd o f t h e i n p u t b a n d wi d t h a r e us e d . i n t h is c a s e , t h e s e con d o r d er t e r m s a r e us ual l y dis t an c e d i n f r e - qu e n c y f rom t h e or i g i n a l s i n e w a ve s , w h i l e t h e t h i r d ord e r te r m s a r e us ual l y a t a f r e q uen c y clos e to t h e i n p u t f r e q uen c ies. a s a r e su l t , t h e s e cond an d t h ir d o r d e r ter m s a r e sp e c if ie d s e p a r a tely . the ca lc u l a t ion o f t h e in t e r m o d u l a t ion dist o r t i o n is as p e r t h e t o tal h a rm o n i c d i s t o r ti o n s p ecif i c a t i o n , w h e r e i t i s th e ra ti o o f th e rm s s u m o f th e in d i v i d u al di s t o r ti o n p r od uct s t o th e rm s a m pli t ude o f t h e s u m o f t h e f u ndam e n t als expr es s e d i n db . ap e r t u r e d e l a y t h e a m ou n t of t i m e f rom t h e l e a d i n g e d ge of t h e s a m p l i ng c l oc k un til t h e a d c a c t u all y tak e s t h e sa m p le . a p e r tu r e j i tt e r the s a m p le-t o- s a m p le va r i a t ion in t h e ef fe c t i v e p o in t i n t i m e a t w h ich t h e ac t u a l s a m p le is t a k e n. fu l l - p o w e r b a n d w i d t h the f u l l -p o w er b a ndwi d t h o f an a d c is t h a t i n p u t f r e q ue n c y a t w h ich t h e a m pli t ude o f t h e r e co n s t r uc t e d f u ndam e n t al is r e d u ced b y 0.1 db o r 3 db f o r a f u l l -s cale in p u t. i n t e g r a l n o nlin ea ri ty (inl) the maxi m u m de v i a t ion f r o m a st ra ig h t li n e p a ssin g t h r o u g h th e en d p o i n t s o f th e ad c tra n sf e r fun c ti o n . d i f f erenti a l n o n l i n e a r i ty ( d n l ) the dif f er ence b e tw e e n t h e m e as ur e d and t h e i d e a l 1 ls b c h a n g e be tw een a n y tw o a d j a cen t cod e s i n t h e a d c . off s et e r r o r the devia t ion of th e f i rs t co de t r a n si tio n (000... 000 t o 000...001) f r o m t h e ide a l (t ha t is, a g nd + 1 ls b). ga in er r o r the devia t ion of th e las t co de tra n si tion (111...1 10 t o 111...111) f r o m t h e ide a l (t ha t is, v ref ? 1 ls b), a f t e r t h e of fs et er r o r has been ad j u s t e d o u t . t r a c k-a nd-h o l d a c q u i s iti o n t i me the mi nim u m t i me r e q u ir e d for t h e t r ack - an d - h o ld am plif ier to r e ma in in trac k m o de f o r i t s o u t p u t t o r e ac h and s e t t le t o wi thin 0.5 ls b o f th e a p p l ied in p u t sig n al . p o w e r su pp l y re j e c t i o n r a t i o ( p sr r ) the ra t i o o f t h e p o w e r in t h e a d c o u t p u t a t f u l l -s cale f r eq uen c y , f , t o th e p o w e r o f a 1 00 mv p-p sin e wa v e a p p l ie d t o t h e ad c v dd s u p p l y o f f r eq ue n c y fs . t h e f r eq ue n c y o f th i s in p u t va r i es f r o m 1 kh z t o 1 mh z. ps rr (db) = 10 log( pf/p f s ) pf i s th e po w e r a t f r eq uen c y f in t h e a d c o u t p u t ; pf s is t h e po w e r a t f r eq u e n c y fs i n t h e a d c o u t p ut.
ad7457 rev. a | page 11 of 20 theor y of opera tion circuit informa t ion the ad7457 is a 12-b i t, lo w p o w e r , sin g le s u p p l y , s u cces s i v e a p p r o x ima t io n a n alog-t o-d i g i ta l co n v er t e r (ad c ) wi t h a ps eudo dif f er en t i al a n alog i n p u t. i t o p era t es w i t h a sin g le 2.7 v t o 5 . 2 5 v po w e r s u p p l y a n d i s ca pa b l e o f th r o u gh p u t ra t e s u p t o 100 ks ps. i t r e q u ir es a n ext e r n al r e f e r e n c e t o be a p p l ie d t o the v ref pi n . the ad7457 has a n o n -c hi p dif f er en tial track-and-h o ld a m plif ier , a succ essi v e a p p r o x ima t io n (s ar) a d c, a nd a s e r i a l in t e r f ace h o us e d in a n 8-lead s o t - 23 p a c k a g e . the s e r i al c l o c k in p u t acces s es da t a f r o m t h e p a r t a nd p r o v ides t h e clo c k s o ur ce f o r th e s u cces s iv e a p p r o x ima t ion ad c. th e ad7457 a u t o ma ti- cal l y p o w e rs do wn a f t e r con v ersio n , r e s u l t in g in lo w p o w e r co n s um p t io n. c o nverter oper a t ion the ad7457 is a s u cces s i v e a p p r o x ima t ion ad c bas e d a r o u n d t w o c a p a c i t i v e d a c s . f i g u re 1 4 an d f i g u re 1 5 show s i m p l i f i e d s c h e ma t i c s o f t h e ad c in t h e acq u isi t io n phas e a nd t h e con v e r - s i on ph a s e, re sp e c t i vely . t h e a d c i s c o m p r i s e d of c o n t ro l l o g i c , a sa r , a n d tw o ca pa ci ti v e d a cs . i n f i g u r e 14 (a cq ui s i ti o n p h as e), sw3 is clos ed , sw1 and sw2 a r e in p o si tio n a, t h e co m p a r a t o r is he ld in a ba lan c e d co n d i t io n, and the s a m p lin g ca p a c i t o r a r ra ys acq u ir e t h e dif f er en t i a l sig n al on t h e in p u t. v in + v in ? a b sw1 sw3 comp ara t o r contr o l logic cap a citive da c cap a citive da c c s c s v ref sw2 b a 03157-0-003 f i g u re 14. a d c ac quis it i o n p h as e w h en t h e ad c s t a r ts a con v ersio n (f igur e 15), sw3 o p e n s, an d sw 1 a n d sw 2 m o v e t o p o s i ti o n b , ca us i n g th e co m p a r a t o r t o beco m e un bala n c e d . b o th in p u t s a r e d i sco n n e c t ed o n ce t h e co n v ersio n b e g i n s . th e co n t r o l log i c a n d t h e c h a r g e r e dis t r i b u - t i o n d a cs a r e us e d to ad d and sub t r a c t f i xe d am o u n t s o f cha r ge f rom t h e s a m p l i ng c a p a c i tor ar r a y s to br i n g t h e c o m p ar ator bac k in t o a b a lan c e d co n d i t io n. w h en t h e co m p a r a t o r is r e bal- a n c e d , t h e con v ersio n is co m p l e t e . th e con t r o l log i c g e n e ra t e s t h e ad c s o u t p u t co de . the o u t p u t i m p e dan c es o f t h e s o ur ces dr i v i n g t h e v in+ a nd t h e v inC p i n s m u s t be ma tc h e d; o t h e r w is e t h e tw o in p u ts ha v e dif f er en t s e t t lin g t i m e s, r e s u l t in g i n er r o r s. v in + v in ? a b sw1 sw3 comp ara t o r contr o l logic cap a citive da c cap a citive da c c s c s v ref sw2 b a 03157-0-004 f i g u re 15. a d c co nvers i on p h as e adc tr ans f er func tion the o u t p u t co din g f o r th e ad74 57 is s t ra ig h t (na t ural) b i na r y . the desig n e d c o de t r a n si t i o n s o c c u r a t s u cces s i v e ls b va l u es (1 ls b , 2 ls b , and s o o n ). th e ls b size is v ref /4096. th e ideal tra n sf er c h a r ac t e r i s t ics o f th e ad7457 a r e sh o w n in f i gur e 16. 000...00 0v adc code analog input 111...11 000...01 111...00 011...11 1lsb v ref ? 1lsb 1lsb = v ref /4096 111...10 000...10 03157-0-005 f i gur e 1 6 . idea l t r ansfe r char act e r i stics t y p i c a l c o nnec t i o n di a g r a m f i gur e 17 s h o w s a typ i cal co nn e c tio n dia g ram f o r th e ad7457. i n t h is s e t u p , t h e gnd p i n is conn e c te d to t h e ana l o g g r o u n d plan e o f t h e sys tem. th e v ref p i n is co nn ec ted to th e ad780, a 2.5 v deco u p l e d r e f e r e n c e s o ur ce . th e sig n al s o ur ce is c o n n e ct ed t o th e v in+ a n a l og i n p u t v i a a un i t y g a in b u f f er . a dc vol t a g e is conn e c te d to t h e v inC p i n t o p r o v ide a ps eudo g rou nd f o r t h e v in+ i n p u t. th e v dd p i n sh o u l d b e d e co u p le d to a g nd wi th a 1 0 f ta n t al u m c a p a ci t o r in p a ra l l e l wi th a 0.1 f cera mic c a p a ci to r . th e r e f e r e n c e p i n s h o u l d b e deco u p led t o a g nd w i t h a c a p a ci t o r o f a t le as t 0.33 f . the co n v ersio n r e s u l t i s output i n a 1 6 - b it word w i t h f o u r l e a d i n g z e ro s f o l l owe d by t h e msb o f t h e 12-b i t r e s u l t .
ad7457 rev. a | page 12 of 20 v in + v in? v dd sclk sdata cs gnd v ref serial interface +2.7v to +5.25v supply 2.5v ad780 ad7457 v ref p- to-p dc input voltage c/ p 03157- 0- 006 0.1 f1 0 f 0.33 f f i g u re 17. t y pic a l conne c t io n d i ag r a m anal og input the ad7457 has a ps eudo dif f er en tial a n alog in p u t. th e v in+ in p u t is co u p led t o th e sig n al s o ur ce a nd sh o u ld ha v e an am p l i - tu d e of v ref p-p t o mak e us e o f t h e f u l l d y na mi c ra n g e o f t h e p a r t . a dc in p u t is a p plie d t o t h e v in? . th e v o l t ag e a p plie d t o t h i s i n put prov i d e s a n of f s e t f rom g rou nd or a p s e u d o g rou nd f o r th e v in + in p u t. en s u r e tha t (v in ? + v in+ ) is les s tha n o r eq ua l to v dd t o a v o i d exce e d i n g t h e maxim u m r a t i n g s o f t h e a d c. the ma in b e n e f i t o f ps eudo dif f er en t i al i n p u ts is t h a t t h e y s e p a ra te t h e an a l o g i n put s i g n a l g rou nd f rom t h e a d c s g rou nd, a l l o w - in g dc co mm on-mo d e v o l t a g es t o b e can c e l e d . b e ca us e t h e a d c o p era t e s f r o m a sin g le s u p p ly , i t is n e ces s a r y t o lev e l shif t g r oun d -bas ed b i p o la r sig n als t o co m p l y wi th t h e in p u t r e q u ir emen ts. an o p a m p (f o r exa m p l e , th e ad8021) c a n b e co nf igur e d to r e s c a l e a nd le vel shif t a g r o u nd-b a s e d ( b i p olar ) s i gn al , so th a t i t i s co m p a t i b le wi th th e i n p u t ra n g e o f th e ad7457. s e e f i gur e 18. w h en a con v ersio n t a k e s pl ace , t h e ps eudo g r o u nd co r r es p o n d s t o 0 a nd t h e maxim u m analog in p u t co r r es p o nds t o 4096. external v ref (2.5v) r v in + v in ? ad7457 2.5v 1.25v 0v v ref +1.25v 0v ?1.25v v in r 3r 0.33 f r 03157-0-007 f i g u re 18. o p a m p conf ig ur at i o n to l e vel sh if t a b i po l a r i n put sig n al anal og input struc t ure f i g u re 1 9 show s t h e e q u i v a l e n t c i rc u i t of t h e an a l o g i n put s t r u c t ur e o f th e ad7457. th e f o ur dio d es p r o v ide es d p r o t ec - t i o n fo r t h e a n alog in p u ts. c a r e m u s t b e t a k e n to en s u r e t h a t t h e a n alog i n p u t s i g n als n e v e r e x ceed th e s u p p l y ra ils b y m o r e th a n 300 mv , w h ic h ca us es t h es e dio d es t o be com e f o r w a r d b i as e d a nd s t a r t co nd u c t i n g i n t o t h e s u bs t r a t e . th es e dio d es can con - d u c t u p t o 10 ma wi t h o u t c a usin g ir r e v e r s i b le da ma g e t o t h e p a r t . t y p i cal l y , t h e c1 ca p a c i t o rs in f i gur e 19 a r e 4 pf a nd can be a t tri b u t e d p r i m a r il y t o p i n ca pa ci t a n c e . th e r e si s t o r s a r e lu m p e d c o m p o n e n t s m a d e up of t h e on re s i st a n c e of t h e swi t ch es. th e va l u e o f th es e r e sis t o r s is typ i cal l y a b o u t 100 ?. the c a p a ci t o rs, c2, a r e t h e ad c s s a m p li n g c a p a ci t o rs, w h ich typ i cal l y ha v e a ca p a c i tan c e o f 1 6 pf . f o r a c a p pl i c a t i o ns , re mov i ng h i g h f r e q u e nc y c o m p o n e n t s f rom t h e a n alog in p u t sig n al t h r o u g h t h e us e o f a n rc lo w p a s s f i l t er on t h e rel e v a n t an a l o g i n put pi ns i s re c o m m e n d e d. in appl i c a - t i o n s w h er e ha r m o n ic dis t o r t i on an d t h e sig n al -t o- n o is e r a t i o a r e cr i t ical, t h e a n alog in p u t sho u ld b e dr i v en f r o m a lo w im p e d a n c e s o urce . l a rge s o ur ce im p e d a n c es can sig n if ican t l y a f fe c t t h e ac p e r f o r ma n c e o f t h e ad c, w h ich ma y n e ces s i t a te t h e us e o f a n in p u t b u f f er a m pl if ier . th e ch o i ce o f t h e o p a m p i s a f u n c t i on o f t h e p a r t ic u l a r a p plica t ion. v in + c1 c2 r1 d d v dd v in ? c1 c2 r1 d d v dd 03157-0-008 f i g u re 19. equiv a le nt a n al og input c i rcuit (convers i o n phas e , switc h es o p e n ; t r a c k phas e , sw itch es clos ed) w h en n o am pli f ier is us e d t o dr i v e t h e a n alog in p u t, t h e s o ur ce im p e dance sh o u ld b e li mi te d to lo w va lues. th e m a x i - m u m s o ur ce im p e dan c e de p e nds o n t h e am o u n t o f to t a l h a r m on i c d i stor t i on t h at c a n b e to l e r a te d. t h e t h d i n c r e a s e s as t h e s o ur ce i m p e dan c e i n cr e a s e s a nd p e r f o r ma n c e deg r ades. f i g u re 2 0 show s a g r a p h of t h e t h d v s . an a l o g i n put s i g n a l f r e q uen c y fo r dif f er en t s o ur ce im p e dances.
ad7457 rev. a | page 13 of 20 input freq uency (khz) 10 thd (db) 20 50 ?80 ?50 ?60 ?70 ?90 40 30 200 ? 10 ? 62 ? 100 ? 03157-0-009 t a = 25 c f i g u re 20. th d v s . a n al og input f r equ e nc y f o r v a ri ous s o ur c e impeda nc es f i g u re 2 1 show s a g r a p h of t h d v s . an a l o g i n put f r e q u e nc y f o r va r i o u s s u p p l y v o l t a g es, while s a m p lin g a t 100 ks ps wi th a n sclk o f 10 mh z. i n this cas e , t h e s o ur ce im p e dan c e is 10 ?. input freq uency (khz) ?90 10 thd (db) 20 50 ?85 ?80 ?75 ?70 ?65 ?60 ?55 ?50 03157-0-010 30 40 v dd = 5.25v v dd = 4.75v v dd = 3.6v v dd = 2.7v t a = 25 c f i g u re 21. th d v s . a n al og input f r equ e nc y f o r v a ri ous su p p ly v o lt ag es digit a l in p u t s the dig i tal in p u ts a p p l ie d t o t h e ad7457 a r e n o t limi t e d b y t h e m a xim u m ra tings tha t l i mi t t h e a n al o g in p u t s . i n s t e a d , t h e d i gi tal i n p u t s ap p l i e d , t h at i s , cs a n d s c l k , ca n go to 7 v a nd a r e n o t r e s t ri ct ed b y th e v dd + 0.3 v limi ts as on t h e a n a l og in p u t. the ma i n ad van t a g e o f t h e i n pu ts n o t b e in g r e s t r i c t e d t o t h e v dd + 0.3 v limi t is tha t p o w e r s u p p l y s e q u en cin g is s u es a r e av o i d e d . if cs or s c l k are a p pl i e d b e f ore v dd , t h er e is n o r i s k o f la t c h-u p as t h er e w o u l d b e on t h e a n alog in pu ts if a sig n al g r ea t e r tha n 0.3 v w e r e a p p l ied p r io r t o v dd . reference sec t ion an ext e r n al s o ur ce is r e q u ir e d to s u p p ly t h e r e fer e n c e t o t h e ad7457. this ref e r e n c e in p u t c a n ra n g e f r o m 1 00 mv t o v dd . the s p e c if ie d r e fer e n c e is 2.50 v fo r t h e p o w e r s u p p ly ra n g e 2.70 v t o 5.25 v . er r o r s in th e r e f e r e n c e s o ur ce res u l t in gain er r o r s in th e ad7457 tra n sf er f u n c tion. a c a p a ci t o r o f a t leas t 0.33 f s h o u ld be p l ace d o n t h e v ref pi n . su it a b l e re f e re nc e s o ur ces f o r th e ad7457 in c l ude th e ad780 a nd the adr421. f i gur e 22 s h o w s a typ i cal co nn e c tio n dia g ram f o r th e v ref pi n . 1 ad780 nc 8 2 v in nc 7 3 gnd 6 4 temp 5 opsel trim v out ad7457 1 v ref 2.5v nc v dd nc v dd 1 additional pins omitted for clarity. nc = no connect 10 f 0.1 f 0.33 f 0.1 f 03157- 0- 011 f i g u re 22. t y pic a l v ref c o nnec t ion d i agr a m for v dd = 5 v serial interf a c e f i g u r e 2 s h o w s a d e ta iled tim i n g d i a g ra m o f t h e se ri al in t e rfa c e o f th e ad7457. the s e r i al c l o c k p r o v ides the con v ersio n c l o c k an d a l s o c o n t ro l s t h e t r a n s f e r of d a t a f rom t h e d e v i c e d u r i ng co n v ersio n s. the f a l l in g e d ge o f cs p o w e rs u p th e ad7457 and als o p u ts th e tra c k - a n d - h o ld i n t o tra c k . p o w e r - u p tim e i s 1 s m i n i m u m a n d , i n th i s tim e , th e d e v i ce also a c q u i r e s th e a n alog i n p u t s i gn al . cs m u st re m a i n l o w f o r t h e d u r a t i on of p o we r - up . t h e r i s i ng e d ge of cs ini t i a t e s t h e co n v ersio n p r o c es s, p u ts t h e t r ack-and- h o ld in t o h o ld m o de , a nd t a k e s t h e s e r i al da t a b u s ou t o f t h r e e-s t a te. the con v ersio n r e q u ir es 16 scl k c y cles t o co m p let e . o n th e s i xt een t h sc lk falli n g ed g e , a f t e r t h e tim e t 8 , t h e s e r i a l da t a b u s g o es b a ck i n t o t h r e e- st a te an d t h e de v i ce a u t o ma t i cal l y en t e r s f u l l p o w e r - do wn. i t r e main s in p o w e r - do wn un til t h e n e xt fal l in g e d ge o f cs . f o r s p eci f i e d pe rf o r m a n c e , th e th r o u gh - p u t ra te sh o u ld n o t excee d 100 ks ps, whic h m e a n s tha t th er e s h o u ld b e n o le s s th a n 10 s be tw ee n co n s ecu t i v e cs fal l in g ed g e s . the con v ersio n r e s u l t f r o m th e ad7457 is p r o v ided on t h e s d a t a o u t p ut as a s e r i al da t a st r e a m . th e b i ts a r e clo c k e d o u t o n th e falli n g e d g e o f th e sc lk i n p u t . th e da ta s t r e a m o f th e ad7457 co n s is ts o f f o ur leadin g zer o s, f o l l o w ed b y th e 12 b i ts o f co n v ersio n da t a t h a t a r e p r o v ide d ms b f i rs t. th e o u t p ut co ding is st ra ig h t (na t u r a l ) b i na r y . sixt e e n s e r i al cl o c k c y cles a r e , th er efo r e , r e q u ir e d t o p e r f o r m a co n v ersio n an d t o acces s da ta f r o m the ad7457 . a r i sin g edg e of cs p r o v ides t h e f i rs t le adin g zero t o b e r e ad in b y t h e micr o - c o n t ro l l e r or d s p . t h e re m a i n i n g d a t a i s t h e n cl o c ke d out o n t h e s u b s eq u e n t s c l k f a ll i n g e d g e s , b e g i n n i n g w i th th e s e c o n d le adin g zer o . th us, t h e f i rs t fal l in g c l o c k e d ge on t h e s e r i al c l o c k af te r cs h a s go ne h i g h prov i d e s t h e s e c o nd l e a d i n g z e ro . t h e f i nal b i t in t h e da t a t r an sfer , b e fo r e t h e de vice go es in t o p o w e r - d o w n , i s v a lid o n th e s i xt een th falli n g ed g e o f sc l k , h a v i n g been c l ock e d o u t o n t h e p r e v i o us (f i f t e e n th ) fallin g ed g e .
ad7457 rev. a | page 14 of 20 i n a p p l ic a t io n s wi t h a s l o w sclk, i t is p o s s i b le to r e ad in da ta o n ea c h sc l k r i s i n g ed g e . i n thi s ca se , t h e f i r s t falli n g ed g e o f sclk a f t e r th e cs r i sin g edg e c l o c ks o u t t h e s e co nd leadin g zer o an d c a n be r e ad in o n t h e f o l l o w in g r i sin g edg e . i f the f i r s t sclk e d g e a f te r t h e cs r i sin g edg e is a fal l in g e d ge , th e f i r s t le adin g zer o t h a t was clo c k e d ou t w h e n cs w e n t hig h is miss e d , unles s i t w a s n o t r e ad o n t h e f i rs t scl k fal l in g e d g e . th e f i f - t e en t h fal l in g e d g e o f sclk clo c ks o u t t h e l a s t b i t o f da t a , w h ich ca n be r e ad in b y th e f o l l o w in g r i sin g sclk edg e . power c o n s umpti o n the ad7457 a u t o ma tical l y en ters p o w e r - do wn a t t h e end o f ea c h co n v e r s i o n . w h en i n t h e p o w e r - d o w n m o d e , all a n alog cir c ui t r y is p o w e r e d do w n an d t h e c u r r en t co nsum p t ion is 1 a . t o achi e v e t h e sp e c if ie d p o w e r co n s um p t io n ( w hich is t h e lo w e s t ), t h er e a r e a fe w t h in gs t h e us er sh o u ld k e ep i n mi n d . the con v ersio n t i me o f t h e de vi ce is det e r m i n e d b y t h e s e r i al clo c k f r e q uen c y . the fast er t h e s c lk f r e q ue n c y , t h e sh o r t e r t h e co n v ersio n t i m e . th er efo r e , as t h e clo c k f r e q uen c y us e d is in cr eased , t h e ad c is d i s s i p a t in g po w e r f o r a s h o r t e r per i o d o f t i me ( d ur in g con v ersio n ) and i t r e ma in s i n p o wer - do w n fo r a lo n g er p e r c en t a g e o f t h e c y cle t i m e o r t h r o u g h pu t ra t e . this ca n b e s e en in f i gur e 23, w h ich sh o w s typ i ca l i dd vs. sclk fr e q u e n c y f o r v dd o f 3 v a n d 5 v , w h en op era t i n g t h e de vic e a t t h e m a x i m u m t h rou g h put of 1 0 0 k s p s . sclk frequency (mhz) i dd (ma) 2.5 2.0 1.0 1.5 0.5 0 02 8 6 41 0 v dd = 3v v dd = 5v 03157-0-023 t a = 25 c f i g u re 23. i dd vs . sclk f r e q ue nc y for v dd = 3 v and 5 v when o p er at ing at 10 0 k s ps f i g u re 2 4 show s t y pi c a l p o we r c o nsu m pt i o n v s . t h rou g h put r a te f o r th e m a xi m u m sc lk f r eq ue n c y o f 10 mh z . i n th i s ca se , t h e co n v ersio n t i m e is t h e s a me fo r al l t h r o u g h p u ts, b e c a us e t h e sc l k f r eq uen c y i s f i x e d . a s t h e th r o u gh p u t ra t e d e cr ea se s , t h e a v era g e p o w e r co n s um pt io n de cr e a s e s, b e ca us e t h e ad c s p e n ds more t i m e i n p o we r - d o w n . 02 0 throughput (ksps) power ( m w) v dd = 3v v dd = 5v 03157-0-024 40 60 80 100 0 2.5 2.0 1.5 1.0 0.5 t a = 25 c f i gure 24. p o wer v s . thro ughput r a te f o r scl k = 10 m h z for v dd = 3 v a n d 5 v micr oprocessor interf a c ing the s e r i al in ter face o f t h e ad74 57 al lo ws t h e p a r t t o b e co n- ne c t e d to a r a ng e of d i f f e r e n t m i c ropro c e ss or s . t h i s s e c t i o n exp l a i n s h o w t o in t e r f ace t h e ad7457 wi th t h e ads p -218x s e r i a l i n te r f ac e. ad7457 to adsp-218x the ads p -218x fa mil y o f ds p s ca n be in t e r f ace d dir e c t l y t o the ad7457 wi t h o u t a n y g l ue log i c. the s e r i al c l o c k f o r th e ad c is prov i d e d by t h e d s p . sd a t a f rom t h e a d c i s c o n n e c t e d to t h e da t a r e ce i v e (dr) in p u t o f t h e s e r i al p o r t an d cs ca n be con - tr o l led b y a f l a g (fl 0 ). t h e co nn ecti o n dia g ra m i s s h o w n in f i gur e 25. sclk sdata cs sclk dr0 rfs fl0 1 additional pins omitted for clarity. sport0 sport1 ad7457 1 adsp-21xx 1 03157-0-025 f i gur e 2 5 . ad74 57 t o adsp -2 18 x s p o r t0 m u s t b e ena b le d t o r e c e i v e t h e con v ersio n da t a and t o p r o v ide t h e scl k , w h i l e spo r t1 m u s t b e co nf i g ur e d fo r f l a g s a nd s o o n .
ad7457 rev. a | page 15 of 20 table 5. sport0 configuration bit setting comment/description isclk 1 serial clock is generated internally slen 1111 16 bits of conversion data rfsr 0 receive frame sync required every word tfsr dont care not used irfs 0 rfs is set to be an input and is generated externally. itfs dont care not used rfsw 1 alternate receive framing tfsw dont care not used invrfs 0 rfs is active high invtfs dont care not used sport0 is configured by setting the bits in its control register, as listed in table 5. the flag to generate the cs signal is generated by sport1. it is connected to both the adc and the rfs input of sport0 to provide the frame sync signal for the dsp.
ad7457 rev. a | page 16 of 20 application hints grounding and layout the printed circuit board that houses the ad7457 should be designed so that the analog and digital sections are separated and confined to certain areas of the board. this facilitates the use of ground planes that can be easily separated. a minimum etch technique is generally best for ground planes, because it gives the best shielding. digital and analog ground planes should be joined in only one place, and the connection should be a star ground point established as close as possible to the gnd pin on the ad7457. avoid running digital lines under the device, because this couples noise onto the die. the analog ground plane should be allowed to run under the ad7457 to avoid noise coupling. the power supply lines to the ad7457 should use as large a trace as possible to provide low impedance paths and reduce the effects of glitches on the power supply line. fast switching signals, such as clocks, should be shielded with digital ground to avoid radiating noise to other sections of the board, and clock signals should never run near the analog inputs. avoid crossover of digital and analog signals. traces on opposite sides of the board should run at right angles to each other. this reduces the effects of feed through the board. a micro strip technique is the best, but is not always possible with a double-sided board. in this technique, the component side of the board is dedicated to ground planes, while signals are placed on the solder side. good decoupling is also important. all analog supplies should be decoupled with 10 f tantalum capacitors in parallel with 0.1 f capacitors to gnd. to achieve the best from these decoupling components, place them as close as possible to the device.
ad7457 rev. a | page 17 of 20 outline dimensions 13 5 6 2 8 4 7 2. 9 0 bs c 1. 6 0 bs c 1.95 bsc 0. 6 5 bs c 0. 3 8 0. 2 2 0. 15 m a x 1. 30 1. 15 0. 90 seating plane 1. 45 m a x 0. 22 0. 08 0. 60 0. 45 0. 30 8 4 0 2 . 80 bs c pin 1 indicato r compliant to jedec standards mo-178ba f i g u re 26. 8-l e ad s m a l l o u t l i n e t r ans i s t or p a ck ag e [so t - 23] (r t - 8) di me nsio ns sho w n i n mi ll im e t e r s ordering guide model temperature r a nge linearity error (lsb) 1 package descri ption package option branding ad7457brt-r2 C40c to +85c 1 8-lead sot-23 rt-8 coj ad7457brt-re e l 7 C40c to +85c 1 8-lead sot-23 rt-8 coj ad7457brtz-re el7 2 C40c to +85c 1 8-lead sot-23 rt-8 cod 1 linearity error here re fer s to integral n o nlinearity error. 2 z = pb-free part.
ad7457 rev. a | page 18 of 20 notes
ad7457 rev. a | page 19 of 20 notes
ad7457 rev. a | page 20 of 20 notes ? 2005 analo g de vices, inc. all rights reserve d . tra d em arks and registered tra d ema r ks are the prop erty of their respective owners . c03157C0 C 2/05(a)

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